MEMS Gallery
![]() 8µm microfluidics channels, formed at low temp without lamination or bonding. Etch holes sealed with dielectric. |
![]() Silicon Anisotropic Etching. Deep silicon etch to full wafer thickness, leaving a 1µm membrane. Wall angle = 54°. |
![]() Stress-free silicon in photonics application |
![]() Optical grating in 10µm silica. Oxide etch, angle = 89.5 ±0.5°. Typical wall roughness = 20nm rms. |
![]() Deep vertical oxide etch |
![]() V-grooves for telecom fiber |
![]() DRIE: Deep, smooth, vertical etch. |
![]() Telecom MEMS: mechanical test structure |
![]() Low-temperature mechanically released infrared mirror |
![]() Low-temperature mechanically released cantilevers |
Low-temperature mechanically released cantilevers |
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Low-temperature mechanically released cantilevers